# ls -l /dev/apalis-uart*

# ls -l /dev/colibri-uart*

# ls -l /dev/verdin-uart*

# stty -F /dev/verdin-uart1 115200
# echo Test > /dev/verdin-uart1

#include <termios.h>
...
struct termios tty;
int fd;
int flags = O_RDWR | O_NOCTTY | O_NONBLOCK;
 
fd = open("/dev/verdin-uart1", flags);
 
tcgetattr(fd, &tty);
 
tty.c_cflag = (tty.c_cflag & ~CSIZE) | CS8;
tty.c_cflag |= B115200;
 
if (tcsetattr (fd, TCSANOW, &tty) != 0)
{
    fprintf (stderr, "error %d from tcsetattr", errno);
    return -1;
}

...
    /* Enable RS485 mode: */
    rs485conf.flags |= SER_RS485_ENABLED;

    /* or, set logical level for RTS pin equal to 0 when sending: */
    rs485conf.flags &= ~(SER_RS485_RTS_ON_SEND);

    /* Set logical level for RTS pin equal to 1 after sending: */
    rs485conf.flags |= SER_RS485_RTS_AFTER_SEND;

    /* Enable receiver during sending, required for i.MX devices */
    rs485conf.flags |= SER_RS485_RX_DURING_TX;
...

&uart2 {
    status = "okay";
    linux,rs485-enabled-at-boot-time;
    rs485-rts-active-low;
    rs485-rx-during-tx;
}

BSP 3 and 2.8

Introduction

Serial port (UART) access from userspace on Linux is provided through TTY devices under /dev. Depending on the driver used to drive the UART, those devices can have different names such as /dev/ttymxc0 or /dev/ttyS0 among others.

This article is very useful if you plan to use UART for communication with other devices - often using RS-232 or RS-485 - but if you just want to access the Linux terminal on the default debug UART, make sure to follow the first lessons from our Quickstart Guide or alternatively read the article Configuring Serial Port Debug Console (Linux/U-Boot).

Toradex Standard Interfaces

Toradex SoMs are pin-compatible within a family, as long as you use the default pin muxing from the Toradex Embedded Linux BSP. In this section, you will learn what UART interfaces are available on all Toradex SoMs within a family.

Keep in mind that each SoM may have additional UART interfaces that you can use at the tradeoff of breaking pin-compatibility. You will need to check how many UARTs are available on your specific SoM and modify the default pin muxing. Reading the SoM datasheet and the article Device Tree Customization are good starting points.

Apalis Family

The Apalis family has 4 pin-compatible UART interfaces.

Colibri Family

The Colibri family has 3 pin-compatible UART interfaces.

Verdin Family

The Verdin family has 4 pin-compatible UART interfaces. Three of them have RX and TX signals in Always Compatible pins, and the fourth has RX and TX signals on Reserved pins.

Configuration

This section has information about how to configure and use the serial, including a sub-section for RS-485.

Command-line

From userspace, one can use the command line utility stty to configure the serial speed. Then the port can be treated as as a regular file:

# stty -F /dev/ttyLP2 115200
# echo Test > /dev/ttyLP2

C

Using C, use the struct termios to set the initial baud rate:

#include <termios.h>
...
struct termios tty;
int fd;
int flags = O_RDWR | O_NOCTTY | O_NONBLOCK;
 
fd = open("/dev/ttyS0", flags);
 
tcgetattr(fd, &tty);
 
tty.c_cflag = (tty.c_cflag & ~CSIZE) | CS8;
tty.c_cflag |= B115200;
 
if (tcsetattr (fd, TCSANOW, &tty) != 0)
{
    fprintf (stderr, "error %d from tcsetattr", errno);
    return -1;
}

Standard Baud Rates

A fixed list of baud rates are pre-defined:

Non-standard Baud Rates

Vybrid modules

With the following userspace C program one can configure UART custom baud rates:

#include <stdio.h>
#include <fcntl.h>
#include <errno.h>
#include <asm/termios.h>
 
int main(int argc, char* argv[]) {
 
	int retval, fd, speed;
	struct termios2 ntio;
 
	if (argc != 3) {
		printf("Usage: %s /dev/ttyXXX 20000\n", argv[0], argv[0]);                   
		return -1;
	}
 
	speed = atoi(argv[2]);
	fd = open(argv[1], O_RDONLY);
	if (fd < 0) {
		perror("Open");
		return -1;
	}
 
	ioctl(fd, TCGETS2, &ntio);
	ntio.c_cflag &= ~CBAUD;
	ntio.c_cflag |= BOTHER;
	ntio.c_ispeed = speed;
	ntio.c_ospeed = speed;
	retval = ioctl(fd, TCSETS2, &ntio);
	close(fd);
 
	if (retval == 0)
		printf("New baud configured\n");
	else
		perror("ioctl");
 
	return 0;
}

Vybrid's UART baud rate depends on the main bus clock. Since the two modules are clocked differently, the modules expose a different minimum and maximum baud rate. The baud rates which can practically be used are as follows:

RS-485

The Toradex Carrier Board implements RS-485 using a single transceiver in a half-duplex communication mode, which means that one medium is shared for transmitting and receiving data. The transceiver switches to transmit mode when the RTS signal is asserted (low active).

RS-485 defines the electrical characteristics of drivers and receivers for serial communication and supports bus topology. How RS-485 is exactly implemented depends on application and requirements. The RS-485 support has been tested using the configuration as found on Toradex Carrier Boards.

Our modules provide the following support:

i.MX 6, i.MX 6ULL and i.MX 7 Modules

The driver uses the RTS output to control a RS-485 transceiver (see below).

Tegra Modules

Due to hardware limitations, there is no RS-485 transceiver control support.

Vybrid, i.MX 8, i.MX 8X and i.MX 8M Mini Modules

The Vybrid, i.MX 8, i.MX 8X and i.MX 8M Mini UART block has built-in support for RS-485 auto RTS for controlling the direction of the RS-485 transceiver (see below).

Enabling RS-485 support

Enable the RS-485 feature by either using ioctl from userspace or using device tree properties.

Userspace

Enable the RS-485 using ioctl TIOCSRS485 from userspace is described in RS-485 Kernel Documentation.

On Toradex carrier boards the following flags should be used:

...
    /* Enable RS485 mode: */
    rs485conf.flags |= SER_RS485_ENABLED;

    /* or, set logical level for RTS pin equal to 0 when sending: */
    rs485conf.flags &= ~(SER_RS485_RTS_ON_SEND);

    /* Set logical level for RTS pin equal to 1 after sending: */
    rs485conf.flags |= SER_RS485_RTS_AFTER_SEND;

    /* Enable receiver during sending, required for i.MX devices */
    rs485conf.flags |= SER_RS485_RX_DURING_TX;
...

Note that neither i.MX6 nor Vybrid based modules evaluate the delay parameters. i.MX6 based modules do additionally not evaluate the logic level parameters.

Device Tree

Enable it in the device tree by setting linux,rs485-enabled-at-boot-time, rs485-rts-active-low and rs485-rx-during-tx property.

&uart2 {
    status = "okay";
    linux,rs485-enabled-at-boot-time;
    rs485-rts-active-low;
    rs485-rx-during-tx;
}

Note: Some kernel version do not support the device tree properties rs485-rts-active-low and rs485-rx-during-tx yet. However, having them specified is not harmful to older kernels. Due to different defaults, newer kernels require those properties for RS-485 operation on Toradex carrier boards.

Note: On Vybrids and i.MX8 CPUs rs485-rts-delay is not working due to lack of hardware support.

Carrier Boards

This section provides details about UARTs on Toradex carrier boards. Remember that our carrier boards are open source and you can check their implementation anytime, just browse on the corresponding product page.

Apalis Evaluation Board

The Apalis Evaluation carrier board does have three regular 9-pin male D-Sub serial connectors for UART1 (RS-232 on bottom X28), UART2 (RS-232 on top X28) and optionally UART2 (RS-422/485 on X55). The UART3 is routed to the IrDA transceiver X30 by default. To route it to the UART1 port instead proceed as follows:

• Remove jumpers X3 rows 38 and 39 and X6 rows 33 to 40 to break the default UART1 to lower 9-pin male D-Sub and UART3 to IrDA connection.
• Connect X2-38 to X7-39 and X2-39 to X7-36 to re-route the UART3_TXD and UART3_RXD MXM3 pins to the UART1 lower 9-pin male D-Sub serial connector.

The UART4 is routed to the mezzanine connector X38 by default. To route it to the UART2 port instead proceed as follows:

• Remove jumpers X3 rows 36 and 37 and X6 rows 29 to 32 to break the default UART2 to upper 9-pin male D-Sub and UART4 to mezzanine connection.
• Connect X2-36 to X7-32 and X2-37 to X7-29 to re-route the UART4_TXD and UART4_RXD MXM3 pins to the UART2 upper 9-pin male D-Sub serial connector.

UART1 can optionally be connected to an integrated FTDI USB-to-serial chip to conveniently access the debug console. Make sure J10 and J12 Pin 2 and 3 are each jumpered (USB) to route TXD/RXD to the FTDI chip. Then, a simple USB A-B cable is sufficient to get a serial console directly from a computer (through /dev/ttyUSB0 on Linux hosts).

Colibri Evaluation Board

The Colibri Evaluation carrier board does have two regular 9-pin male D-Sub serial connectors for UART_A (lower) and UART_B (upper). The UART_C is routed to the IR by default. To route it to the UART_A port instead proceed as follows:

• Remove jumpers X11 rows 2, 3, 10 and 11 to break the default UART_A to lower 9-pin male D-Sub and UART_C to IR connection.
• Connect X10-2 to X12-10 and X10-3 to X12-11 to re-route the UART_C_RXD and UART_C_TXD SODIMM pins to the UART_A lower 9-pin male D-Sub serial connector.

UART_A can optionally be connected to an integrated FTDI USB-to-serial chip to conveniently access the debug console. Make sure J17 and J19 Pin 2 and 3 are each jumpered (USB) to route TXD/RXD to the FTDI chip. Then, a simple USB A-B cable is sufficient to get a serial console directly from a computer (through /dev/ttyUSB0 on Linux hosts).

Dahlia Carrier Board

• UART_3 and UART_4 are available on the USB Type Micro-B port (X18), via the USB to serial converter FT4232HL. You can use a regular USB Type Micro-B to Type-A.
  • It is possible to route those interfaces to the Primary Extension Header with Dahlia's assembly options. Consult the datasheet for more details.
  • In addition, FTDI and GPIO functions of the FT4232HL are connected to the Verdin SoM via R293-R296, JP6 and JP7. Consult the datasheet for more details.
• UART_1 is available on the Primary Extension Header (X20), as +1.8V TTL signals.
• UART_2 is available on the Secondary Extension Header (X19), as +1.8V TTL signals.

Iris Carrier Board

• To use UART_A (FF_UART) on the Iris carrier board a regular 10 pin female IDC to 9-pin male D-Sub RS-232 serial cable adapter (e.g. as used for most former PC motherboards) on X13 is required.
• To use the UART_B (BT_UART) on the Iris carrier board one can use the same regular RS-232 serial adapter from X13 on X14 as the RXD/TXD and RTS/CTS pins share the same connector layout.
• To use UART_C (STD_UART) on the Iris carrier board one can use X14 pin 1 as UART_C_RXD and pin 7 as UART_C_TXD.

For more information, see also Iris Carrier Board Peripherals.

Ixora Carrier Board

• To use UART1 on the Ixora carrier board a regular 10 pin female IDC to 9-pin male D-Sub RS-232 serial cable adapter (e.g. as used for most former PC motherboards) on X22 is required.
• To use the UART2 on the Ixora carrier board one can use the same regular RS-232 serial adapter from X22 on X21 as the RXD/TXD and RTS/CTS pins share the same connector layout.
• To use UART3 on the Ixora carrier board one can use X21 pin 1 as UART3_RXD and pin 7 as UART3_TXD.
• UART4 is only available as TTL level on the extension connector X27.

Verdin Development Board

The Verdin Development Board exposes the four UART interfaces.

• UART_3 and UART_4 are available on the USB Type Micro-B port (X66), via the USB to serial converter FT4232HL. You can use a regular USB Type Micro-B to Type-A.
  • In addition, FTDI and GPIO functions of the FT4232HL are connected to the Verdin SoM via the X67 jumper area.
• UART_1 is available on a regular 9-pin male D-Sub serial connector (X50), through a RS-485 transceiver. Read the datasheet for available hardware configuration via jumpers JP6, JP9 and JP10.
• UART_2 is available on a regular 9-pin male D-Sub serial connector (X51), through a RS-232 transceiver. Read the datasheet for available hardware configuration via jumpers JP12.

Computer on Modules

This section provides details about UARTs on Toradex Computer on Modules.

Apalis iMX6

Note: The i.MX6 UARTs can be switched between DTE and DCE mode. The Apalis iMX6 module's pin assignment is designed for DTE mode.

Note: For V1.0A modules the assignment is different. UART3 and UART4 are swapped. e.g. UART3 is implemented with the i.MX6 UART5. All RX/TX lines are swapped and the UARTs have to be used in DCE mode to get the RX/TX functionality on the correct pins.

Apalis iMX8

Apalis iMX8X

Apalis T30

Apalis TK1

Colibri iMX6

Note: The i.MX 6 UARTs can be switched between DTE and DCE mode. The Colibri iMX6 module's pin assignment is designed for DTE mode.

Colibri iMX6ULL

Note: The i.MX 6ULL UARTs can be switched between DTE and DCE mode. The Colibri iMX6ULL module's pin assignment is designed for DTE mode.

Colibri iMX7

Note: The i.MX 7 UARTs can be switched between DTE and DCE mode. The Colibri iMX7 module's pin assignment is designed for DTE mode.

Colibri iMX8X

Colibri Txx

By default, the first serial port uses the compatible 8250 driver to show a serial console (since NVIDIA's HS driver does not support a serial console).

[    2.702878] Serial: 8250/16550 driver, 1 ports, IRQ sharing disabled
[    2.703164] serial8250.0: ttyS0 at MMIO 0x70006000 (irq = 68) is a XScale
[    3.377362] console [ttyS0] enabled
[    3.381016] tegra_uart.1: ttyHS1 at MMIO 0x70006040 (irq = 69) is a 16550
[    3.387879] Registered UART port ttyHS1
[    3.391734] tegra_uart.3: ttyHS3 at MMIO 0x70006300 (irq = 122) is a 16550
[    3.398681] Registered UART port ttyHS3
[    3.402550] Initialized tegra uart driver

Resources used by serial port on T20 devices:

root@colibri_t20:~# cat /proc/interrupts
 68:     100052          0         PPI  serial
 69:         40          0         PPI  tegra_uart_1
...
122:         47          0         PPI  tegra_uart_3

root@colibri_t20:~# cat /sys/kernel/debug/clock/clock_tree
   clock                          state  ref div      rate
--------------------------------------------------------------.
...
   clk_m                          on     20           13000000
...
      uartd                       on     1   1        13000000
      uartb                       on     1   1        13000000
...
      pll_p                       on     11  x16.6..  216000000
...
         uarta                    on     1   1        216000000

Colibri VFxx

Our Vybrid based modules provide UART access through a Vybrid specific LP UART serial driver. The driver currently supports baud rates from 600 Baud up to 921600 Baud and can handle RTS/CTS hardware flow control.

Note: UART3 and UART4 are not enabled by default on our standard images and need device tree modifications to be enabled.

[    0.232712] 40027000.serial: ttyLP0 at MMIO 0x40027000 (irq = 20, base_baud = 5210526) is a FSL_LPUART
[    0.840359] 40028000.serial: ttyLP1 at MMIO 0x40028000 (irq = 21, base_baud = 5210526) is a FSL_LPUART
[    0.856812] 40029000.serial: ttyLP2 at MMIO 0x40029000 (irq = 22, base_baud = 5210526) is a FSL_LPUART

Especially on higher baud rates and the slower Colibri VF50, overruns (and hence loss of characters) can happen. Check the tty driver statistics if you are suffering from those issues:

# cat /proc/tty/driver/fsl-lpuart
serinfo:1.0 driver revision:
0: uart:FSL_LPUART mmio:0x40027000 irq:20 tx:6131 rx:150 RTS|DTR
1: uart:FSL_LPUART mmio:0x40028000 irq:21 tx:0 rx:0
2: uart:FSL_LPUART mmio:0x40029000 irq:22 tx:121426 rx:110495 oe:19 RTS|DTR

To ensure that no character is lost, use hardware flow control signals such as RTS/CTS or lower baud rates.

Enabling/disabling DMA

The current driver has a weak DMA implementation, which can lead to lock ups, especially on the RX side. The non-DMA (PIO) mode is much more robust, and thanks to the hardware FIFO also quite efficient. The easiest way to disable the DMA mode is to overwrite the dma-names property (see also Device Tree Customization):

--- a/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi
@@ -254,6 +254,7 @@
 
 &uart0 {
        status = "okay";
+       dma-names = "", "";
 };
 
 &uart1 {

Releases after V2.5 Beta 1 have a kernel argument to enable/disable DMA. The DMA is by default disabled, to re-enable UART DMA use:

setenv defargs '${defargs} fsl_lpuart.nodma=0'

Verdin iMX8M Mini

UART devices available on Linux:

UART devices available only for the Cortex-M4, unless you properly modify the device tree:

Note: The i.MX8M Mini UARTs can be switched between DTE and DCE mode. The Verdin standard data direction is designed for DTE mode - which means that the SoC is configured in DCE mode.

Verdin iMX8M Plus

UART devices available on Linux:

UART devices available only for the Cortex-M7, unless you properly modify the device tree:

Note: The i.MX8M Plus UARTs can be switched between DTE and DCE mode. The Verdin standard data direction is designed for DTE mode - which means that the SoC is configured in DCE mode.