The External Memory Bus, referred to as "External Interface Module" in Freescale documentation, is a bus protocol for communication from an integrated circuit to an external memory device. The external memory bus is typically used to connect high speed devices like FPGAs, DSPs, secondary Ethernet controllers, CAN controllers, etc.
Colibri VFxx does not feature an external memory bus that is compatible within the Colibri family. There is an external bus (called FlexBus) available as a secondary function of interface pins. Some bus control signals are missing since they are only available on Vybrid pins that are connected to the internal NAND flash. Whenever it is possible, the SPI, QSPI, USB or I2C interface should be preferred for connecting a peripheral device including FPGA or DSPs.
Support for the external memory bus is provided by the Tegra's Generic Memory Interface (GMI). The Colibri T20 supports up to a 32 bit data bus width while the Colibri T30 supports up to a 16 bit data bus width. Up to 28 address bits are available enabling up to 256MB of addressable space per chip select. They may be configured for both asynchronous and burst modes and have support for DMA.
The Toradex Tegra Linux images do not provide a fully functional general purpose GMI driver. However, there are a few ways to use the interface as well as multiple example drivers which may be adapted:
Simple 128kB write & read back tests are performed using Non-Mux mode with DMA enabled. Additionally, AHB Prefetch & 8 word DMA burst are enabled. CPU clocks were locked at their max frequency. Both Async & Burst modes were tested.
DMA Async
Read = 9.207 MBps (73.656 Mbps)
Write = 9.344 MBps (74.752 Mbps)
DMA Burst:
Read = 64.876 MBps (519.008 Mbps)
Write = 10.688 MBps (85.504 Mbps)
DMA Async:
Read = 11.350 MBps (90.800 Mbps)
Write = 11.379 MBps (91.032 Mbps)
DMA Burst:
Read = 37.204 MBps (297.632 Mbps)
Write = 11.253 MBps (90.024 Mbps)
The Colibri i.MX6 supports up to a 16 bit data bus width in non-multiplexed mode and up to a 32 bit data bus width in multiplexed mode. Up to 26 address bits are available enabling up to 128MB of addressable space per chip select. It may be configured for both asynchronous and burst modes. The i.MX6 EIM may be clocked up to 133MHz. The latest i.MX6 EIM (External Interface Module) driver supports a 16-bit non-multiplexed asynchronous mode for up to four chip select signals.
Simple 128kB write & read back tests yield the following performance:
Read = 22.552 MBps (180.416 Mbps)
Write = 19.807 MBps (158.456 Mbps)
The External Memory Bus on the Colibri i.MX6 ULL is not compatible with any other Colibri module since the required interface pins are not located at the standard Colibri position. The bus is only available as alternate functions of other interfaces such as the parallel RGB LCD, the SD card, and the camera interface. Some of the bus signals are not available on the Colibri module edge connector since they are located at the NAND interface which is used on the module to boot from.
The Colibri i.MX6 ULL supports up to a 16 bit data bus width in non-multiplexed mode. Up to 15 address bits are available enabling up to 128MB of addressable space per chip select. It may be configured for both asynchronous and burst modes. The i.MX6 ULL EIM may be clocked up to 133MHz. The latest i.MX6 ULL EIM (External Interface Module) driver supports a 16-bit non-multiplexed asynchronous mode for up to three chip select signals.
The Colibri i.MX7 supports up to a 16 bit data bus width in non-multiplexed mode and multiplexed mode. Up to 27 address bits are available enabling up to 128MB of addressable space per chip select. It may be configured for both asynchronous and burst modes. The iMX7 EIM may be clocked up to 132MHz. The latest i.MX7 EIM (External Interface Module) driver supports a 16-bit non-multiplexed asynchronous mode for up to four chip select signals.
The devmem2 tool is a simple program to read/write from/to any location in memory. Please consult the man page for more information.
