External Chip selects are available on all Colibris. But since the PXA3xx chip select signals are generated from a CPLD instead of coming from the PXA3xx, the usage of the chip selects depend of the Colibri version.
The chip selects are hardware signals generated directly by the PXA270 processor.
The timings for each of the 3 chip selects nCS1, nCS3 and nCS4 can be configured separately.
| PXA270 nCSx | PXA270 GPIO# | SODIMM# | Addr Space (Size) | Evalboard Jumper# | Evalboard nCS |
|---|---|---|---|---|---|
| nCS1 | 15 | 105 | 0x04000000 (64MB) | X11.41 | CAN_CS# |
| nCS3 | 79 | 107 | 0x0C000000 (64MB) | X11.42 | nEXT_CS[1] |
| nCS4 | 80 | 106 | 0x10000000 (64MB) | X8.44 | nEXT_CS[2] |
| - | - | (3.3V) | - | X11.43 | nEXT_CS[0] |
Please refer to the Evaluation Board schematics for more information. The mapping can be changed by removing the jumpers and adding patch wires.
On the Colibri PXA3xx the chip selects are generated through an on-board CPLD.
The following information applies to Colibri PXA320 V1.2 and higher, PXA300 (XT)/310 V1.1 and higher.
| CPLD nCSx | SODIMM# | Addr Space (Size) | Evalboard Jumper# | Evalboard nCS |
|---|---|---|---|---|
| EXT_nCS0 | 105 | 0x14000000 (32MB) | X11.41 | CAN_CS# |
| EXT_nCS1 | 107 | 0x16000000 (16MB) | X11.42 | nEXT_CS[1] |
| EXT_nCS2 | 106 | 0x17000000 (8MB) | X8.44 | nEXT_CS[2] |
| - | (3.3V) | - | X11.43 | nEXT_CS[0] |
Set the GPIO's alternate function to GPIO Set the GPIO's direction to Input (This is the default state of this pins, you dont have to do this step if you didn't change one of these GPIOs before).
The following PXA registers need to be configured:
For more information about the CPLD configuration refer to the Colibri PXA3xx CPLD Description.
